TECHNICAL PROGRAM (final)

Thursday a.m. Room A (AULA)
09^00 – 09^20	Opening Ceremony
09^20 – 10^20	Plenary talk: Digital Signal Processing: Road to the Future
	Sanjit K. Mitra
10^20 – 11^20	Plenary talk: Sigma-Delta Converters for Wireline and Wireless
	Angel Rodriguez-Vazquez

Thursday p.m. Room A (AULA)
A1. Special Session Circuits for Communications I
Chair :		Alexander S. Dmitriev
12^00 – 12^20	Separation of Wideband Chaotic Signals
	Yu. Andreyev, E. Efremova
12^20 – 12^40	Noise-Resistant Chaotic Synchronization of Nonhyperbolic Maps via Information Transmission
	A.S. Dmitriev, M. Hasler, G.A. Kassian, A.D. Khilinsky
12^40 – 13^00	Communications with Ultrawideband Chaotic Carrier
	Alexander S. Dmitriev, Andrey I. Panas, Sergey O. Starkov
13^00 – 13^20	Chaotic Synchronization in Communication Systems with Finite Number of States
	A.A. Dmitriev
13^20 – 13^40	Control of Power Spectrum Envelope in Single-Transistor Chaotic Oscillator
	E.V. Efremova, N.A. Maksimov, A.I. Panas
13^40– 14^00	Ultrawideband Multipath Indoor Channel for Direct Chaotic Communications
	Andreyev Yu.V., Khadgi B.A., Morozov V.A., Starkov S.O
Thursday p.m. Room B
B1. Transforms and Algorithms for Signal Processing
Chair:		J. Luis Tecpanecatl-Xihuitl
12^00 – 12^20	Efficient Multistage Decimation Filter Using Pipeline/Interleaving Architectures for Digital IF Receiver
	J.Luis Tecpanecatl-Xihuitl, Magdy A. Bayoumi
12^20 – 12^40	Implementation of the Hough Transform by the On-Line Mode
	H. Bessalah, F. Alim, S. Seddiki
12^40 – 13^00	A Self-Timed, Pipeline Floating Point FFT Processor Architecture
	Khosrov Dabbagh-Sadeghipour, Mohammad Eshghi
13^00 – 13^20	An Ultra High-Speed FFT Processor
	Kai Zhong, Hui He, Guangxi Zhu
13^20 – 13^40	ATMEL FPGA and ALTERA fpSLIC Realization of a Fast Pattern Recognition Algorithm
	Rego Kozma, Csaba Horvath, Gabor Hosszu, Ferenc Kovacs

Thursday p.m. Room C
C1. Signal Processing I
Chair:		Paul Cristea
12^00 – 12^20	Genomic Signal Analysis
	Paul Cristea, Rodica Tuduce
12^20 – 12^40	Signal Processing Methods in Analysing of Spatial-Temporal Climate Data
	Branimir Reljin, Irini Reljin, Gordana Jovanovic
12^40 – 13^00	Sub-Optimal Solutions to Code Synthesis for Space-Time Diversity
	S. Ciochina, C. Anghel, A.A. Enescu
13^00 – 13^20	On the Behaviour of RLS Adaptive Algorithm in Fixed-Point Implementation
	S. Ciochina, C. Paleologu, A.A. Enescu
13^20 – 13^40	Noise Suppression Using Morphological Filters
	E. Podaru, D. Stanomir
Thursday p.m. Room D
D1. Computer Aided Design
Chair:		Marina Topa
12^00 – 12^20	Moment-Based Estimation of Switching Activity in Non-Linear Architectures
	Alberto Garcia-Ortiz, Manfred Glesner
12^20 – 12^40	Fast and Accurate Identifying Subcircuits Using an Optimization Based Technique
	Nikolay Rubanov
12^40 – 13^00	Design Optimization of Analog Integrated Circuits Using Simulation-Based Genetic Algorithm
	M. Taherzadeh-Sani, R. Lotfi, H. Zare-Hoseini, O. Shoaei
13^00 – 13^20	An Equation-Based Optimization Approach for Analog Circuit Design
	Emil Hjalmarson, Robert Hagglund, Lars Wanhammar
13^20 – 13^40	Computer-Aided Network Function Approximation for Multicriteria Filter Design
	L. Nedelea, Marina Topa, M. Neag
13^40– 14^00	Automatical Exploration of Low Power Architecture in Co-Design Tool
	Guitton-Ouhamou Patricia, Belleudy Cecile, Auguin Michel

Thursday p.m. Room E
E1. Power Electronics I
Chair:			Serban Birca-Galateanu, Mihai Lucanu
12^00 – 12^20		Low Peak Current Class E Resonant Full-Wave Low dv/dt Rectifier Driven by a Square-Wave Voltage Generator
		Serban Birca-Galateanu
12^20 – 12^40		Multiple-Loop Control of DC-DC Converters
		Serban Birca-Galateanu
12^40 – 13^00		A Hybrid PID-Fuzzy Controller For DC/DC Converters
		Alexandru Diordiev, Ovidiu Ursaru, Mihai Lucanu, Liviu Tigaeru
13^00 – 13^20		Intelligent Charger with Fuzzy Logic
		P. D. Ionescu, Mihaela Moscalu, A. Moscalu
13^20 – 13^40		Fuzzy Logic Torque Ripple Minimization of Switched Reluctance Motors
		Mahdi Jalili-Kharaajoo, Hassan Ebrahimirad
13^40– 14^00		A Note on Fuzzy Variance Analysis Model
		Mahdi Jalili-Kharaajoo, Hassan Ebrahimirad
Thursday p.m. Room A
A2. Special Session Circuits for Communications II
Chair:			Alexander S. Korotkov
15^30 – 15^50	An Overview of Passive Optical Networks
	P. Ossieur, X.Z Qiu, J. Bauwelinck, D. Verhulst, Y. Martens, J. Vandewege, B. Stubbe
15^50 – 16^10	Analysis of a Joint Action’s Opportunity of Ultra-Wideband and Narrow-Band Communication Systems in the Same Frequency Band
	I.J. Immoreev, A.A. Sudakov
16^10 – 16^30	Single Chip 1.8 Ghz Band Pass LNA with Temperature Self-Compensation
	D. Zito, L. Fanucci, B. Neri, S. Di Pascoli, G. Scandurra
16^30 – 16^50	Fully Integrated Heterodyne RF Receiver for ISM Band Applications
	S. Di Pascoli, L. Fanucci, F. Giusti, B. Neri, D. Zito
16^50 – 17^10	Fractional Phase-Locked Loop Frequency Synthesizer
	Milan Stork, Petr Kaspar

Thursday p.m. Room B
B2. Special Session Models and Algorithms for Multichannel Imagery
Chair:			Vasile Buzuloiu
15^30 – 15^50		Color Image Processing Using Logarithmic Operations
		Vasile Patraacu, Vasile Buzuloiu
15^50 – 16^10		Objective and Subjective Color Image Quality Evaluation for JPEG 2000-Compressed Images
		Adrian Stoica, Constantin Vertan, Christine Fernandez-Maloigne
16^10 – 16^30		A New Inter-Color Distance Based on Color to Planar Shape Mapping
		M. Zamfir, C. Vertan, M. Ciuc
16^30 – 16^50		Color Morphology-Like Operators Based on Color Geometric Shape Characteristics
		E. Zaharescu, M. Zamfir, C. Vertan
16^50 – 17^10		Multiwavelets in MRI
		Stefanita M. Ciurel, Vasile Buzuloiu, Vasile Patrascu
17^10 – 17^30		Comparative Study of Motion Estimation Methods for Spatio-Temporal Interpolation
		C. Grava, V. Buzuloiu, A. Grava
Thursday p.m. Room C
C2. Signal Processing II Speech processing and Recognition
Chair:			Silviu Ciochina
15^30 – 15^50	Voice - Dial By Statistical Recognition of Continuous Speech
	Corneliu Octavian Dumitru, Inge Gavat
15^50 – 16^10	Removal of Impulse Noise From Audio and Speech Signals
	Ruben Rajagopalan, Balaji Subramanian
16^10 – 16^30	Speech Enhancement Using Spectral Oversubtraction and Residual Noise Reduction
	R.M. Udrea, S. Ciochina
16^30 – 16^50	Tips on Speaker Recognition by Autoregressive Parameters and Connectionist Methods
	Mihaela Costin, Anthony Grichnik, Marius Zbancioc
16^50 – 17^10	On the Speaker Verification Using the TESPAR Coding Method
	Eugen Lupu, Zoltan Feher, Petre G. Pop
17^10 – 17^30	Conclusions on Analysis and Synthesis of Large Semivocalic Formantic Transitions
	Doina Jitca, Vasile Apopei

Thursday p.m. Room D
D2. Cellular Neural Networks
Chair:		Radu Dogaru
15^30 – 15^50	A Universal CNN Neuron for CMOS Technology: Model and Functional Capabilities
	Radu Dogaru, Cristian Chitu, Manfred Glesner
15^50 – 16^10	A CMOS Universal Neuron Circuit, Static and Dynamic Spice Simulations
	Cristian Chitu , Radu Dogaru, Manfred Glesner
16^10 – 16^30	Modeling, Analysis and Design of a Class of Cellular Neural Networks
	Giuseppe Grassi, Donato Cafagna
16^30 – 16^50	Some Separable Linear Filtering Tasks Using CNNS
	Radu P. Matei
16^50 – 17^10	On the CNN Template Design for Gabor-Type Filters Based on Pade Approximation
	E. David, P. Ungureanu, M. Ansorge, L. Goras

Thursday p.m. Room E
E2. Power Electronics II
Chair:		Dimitrie Alexa, Dorin O. Neacsu
15^30 – 15^50	Improved 1kW Solar Inverter with Wide Input Voltage Range
	K.H. Edelmoser, F.A. Himmelstoss
15^50 – 16^10	Matlab –Based Design of Rectifiers with Almost Sinusoidal Input Currents
	A. Sirbu, D. Alexa, I. Cleju, T. Goras
16^10 – 16^30	An Analysis and a Simulation of Static Frequency Converter Using Three-Phase Rectifiers with Almost Sinusoidal Input Currents
	Catalin-Sorin Vinatoru, Victor Palagniuc, Elena Lupea, Dimitrie Alexa
16^30 – 16^50	Single Phase AC Chopper with IGBT’s
	Mihai Lucanu, Ovidiu Ursaru, Cristian Aghion
16^50 – 17^10	IGBT- Based “Cycloconverters” Built of Conventional Current Source Inverter Modules
	Dorin O. Neacsu
17^10 – 17^30	OTA – Based Control System of Active Power Filter for Harmonic and Reactive Power Compensation
	Sombat Vanichprapa, Boonruk Chipiphop, Chayant Koompai, Kenzo Watanabe

Friday a.m. Room A
A3. Special Session Circuits for Communications III
Chair:		Alexander S. Korotkov
09^00 – 09^20	Multirate Harmonic Balance Simulation
	C. Neacsu
09^20 – 09^40	A 10Gb/s Electro-Absorption-Modulator (EAM) Driver Using Push-Pull Emitter Followers and a Cascoded Output Switch
	Adrian Maxim
09^40 – 10^00	A Novel High-Speed Programmable Counter Architecture for 5Ghz WLAN Application
	Haiyong Wang, Min Lin, Yongming Li, Hongyi Chen
10^00 – 10^20	A New CMOS Wideband PLL-Based Frequency Synthesizer
	Haiyong Wang, Min Lin, Yongming Li, Hongyi Chen
10^20 – 10^40	Lower Sideband Up Converter with Varactor Diode
	Dan Dorin Cepareanu , Nicolae Lucanu , Irinel Valentin Pletea
10^40 – 11^00	CMOS RF Mixer Design – a Noise Cancellation Approach
	C.M. Pavaluta, C. Neacsu, M. Derevlean, G. Arsinte
Friday a.m. Room B
B3. Integrated Circuits I
Chair:		Tiberiu Seceleanu
09^00 – 09^20	Segment Arbiter as Action System
	Tiberiu Seceleanu, Tomi Westerlund
09^20 – 09^40	A Stochastic Framework for Communication Architecture Evaluation in Networks-On-Chip
	Tudor Murgan, Alberto Garcia-Ortiz, Mihail Petrov, Manfred Glesner
09^40 – 10^00	Pipelined on-chip Bus Architecture with Distributed Self-Timed Control
	Juha Plosila, Pasi Liljeberg, Jouni Isoaho
10^00 – 10^20	VLSI Design and Verification Methodologies for Automotive Embedded Systems
	L. Fanucci , A. Giambastiani, C. Rosadini
10^20 – 10^40	Control with Microcontroller for PWM Single-Phase Inverter
	Laurentiu Dimitriu, Mihai Lucanu, Cristian Aghion, Ovidiu Ursaru
10^40– 11^00	A Method to Enhance Data Transfer Performances in a Real-Time Complex System Using Serial Multiplexed Bus
	Liliana Vornicu, Laurentiu Dimitriu

Friday a.m. Room C
C3. Signal Processing III
Chair:		Branimir Reljin
09^00 – 09^20	Knowledge – Based Contour Detection in Medical Imaging Using Fuzzy Logic
	H. Costin, Cr. Rotariu
09^20 – 09^40	Modified Encoding of the Significance Maps in Image Compression with Wavelets
	Daniela Coltuc
09^40 – 10^00	Denoising SAR Images
	Maria Kovaci, Dorina Isar, Alexandru Isar
10^00 – 10^20	A Comparison Between Two Preprocessing Techniques in PCA-Based Face Recognition
	Iulian B. Ciocoiu, Brent Valmar
10^20 – 10^40	Two Color Based Face Detection Algorithms : A Comparative Approach
	T.D.Teodorescu, V.A. Maiorescu, J-L. Nagel, M. Ansorge
Friday a.m. Room D
D3. Communications I
Chair:		Ion Bogdan
09^00 – 09^20	Radio Link Simulation Method for UMTS Communications in Rayleigh Fading Environment
	O. Fratu, S. Halunga, D.N. Vizireanu
09^20 – 09^40	Layered Reconfiguration Management in Software Radio Systems Based on General PCs and Network
	Cong Shen, Xin Su, Xibin Xu, Yan Yao
09^40 – 10^00	Audio Quality of Internet Radio Systems
	Konrad V. Pfaff, Corneliu Toma
10^00 – 10^20	A Comparison Study over the Influence of Phase Noise on Multi-Carrier Communications
	A.A. Enescu, L. Topoloiu
10^20 – 10^40	SystemC Simulation Framework of Protocol Processing Architectures for IPV6 Routing
	Dragos Truscan, Seppo Virtanen, Johan Lilius
10^40 – 11^00	System Level Design of Baseband OFDM for Wireless LAN
	Ciprian Comsa, Ion Bogdan
Friday a.m. Room E
E3. Drive and Control Systems
Chair:		Corneliu Botan
09^00 – 09^20	Robust Sliding Mode Control Applied to Speed Control of PM Synchoronous Motors
	Hassan Ebrahimirad, Sadegh Vaez-Zadeh, Mahdi Jalili-Kharaajoo
09^20 – 09^40	Fixed End-Point Problem for a Servo Drive System
	C. Botan, F. Ostafi, A. Onea
09^40 – 10^00	Induction Motor Supply in Low Speed Range by PWM Inverters
	M. Albu, V. Horga, M. Ratoi
10^00 – 10^20	A Self-Commissioning Method for Induction Motor Drive Systems
	V. Horga, A. Onea, M. Ratoi, I. Graur
10^20 – 10^40	Multitime Scale Approach to Induction Motor Parameter Estimation
	A. Onea, V. Horga, C. Botan, M. Albu
10^40 – 11^00	A Capacitive Speedometer
	Mihai Antoniu, Laurentiu Dimitriu, Eduard Antoniu, Nonel Thirer

Friday a.m. Room A
A4. Circuits and Systems I
Chair:		Georgi A. Nenov
11^40 – 12^00	Numerical Simulation of Oversampled Switched-Capacitor Circuits
	A.S. Korotkov, M.V. Telenkov
12^00 – 12^20	Determination of First-Order Nullor Network Transfer Function Sensitivity by Using Coates Signal-Flow Graphs
	Georgi A. Nenov
12^20 – 12^40	Single OP-AMP High-Order CT Polynomial ARC-LP-Filters
	Gleb N. Slavski
12^40 – 13^00	Efficient Symbolic Analysis Method for Large-Scale Analog Circuits
	Mihai Iordache, Lucia Dumitriu, Lucian Mandache
13^00 – 13^20	Study of High Temperature Superconducting Thin Film with Application in Microwave Circuits
	M. Elkordy

Friday a.m. Room B
B4. Integrated Circuits II
Chair:		Raimund Ubar
11^40 – 12^00	A Low Noise-High Count Rate Readout System for X-Ray Imaging Applications
	Em. Zervakis, D. Loukas, N. Haralabidis, A. Pavlidis
12^00 – 12^20	An Area-Efficient Low-Power SC Integrator for Very High Resolution ADCS
	Hashem Zare-Hoseini, M. Yaser Azizi, Omid Shoaei
12^20 – 12^40	A High Precision High Speed S2I Switched Current Grounded Gate Class AB Memory Cell
	M. Loulou, M. Fakhfakh, N. Masmoudi
12^40 – 13^00	An 8 Bit, 150 Ms/S Folding and Interpolating ADC in 0.25 µM CMOS with Resistive Averaging
	Hamid R. Ahmadi, Omid Shoaei, M. Yaser Azizi
13^00 – 13^20	A 1-V MOSFET-Only Fully-Differential Dynamic Comparator for Use in Low-Voltage Pipelined A/D Converters
	R. Lotfi , M. Taherzadeh-Sani, O. Shoaei
13^20 – 13^40	Design and Implementation of Video DAC in 0.13 µM CMOS Technology
	Cristian Ionascu, Dan Burdia

Friday a.m. Room C
C4. Signal Processing IV
Chair:		Michael Ansorge
11^40 – 12^00	Accurate Energy Exploration in Low-Power MAC Architectures
	Alberto Garcia-Ortiz, Lukusa D. Kabulepa, Manfred Glesner
12^00 – 12^20	Implementation of 3D-DCT Based Video Encoder/Decoder System
	M.B. Abdelhalim, A.E. Salama
12^20 – 12^40	A Scalable Multiplier-Less Fully-Pipelined Architecture for VLSI Implementation of Discrete Hartley Transform
	P.K. Meher, T. Srikanthan
12^40 – 13^00	Low Power Noise Generation System Using DCT
	Dae-Ik Kim, Myung-Whan An, Ho-Yong Chung, Suk-Young Kim
13^00 – 13^20	An Efficient Systolic Array Algorithm for the VLSI Implementation of the ODD-Squared Generalized Discrete Hartley Transform
	Doru Florin Chiper
13^20 – 13^40	Run-Time Reconfigurable Power-Aware Pipelined Signed Array Multiplier Design
	Jia Di, J.S. Yuan

Friday a.m. Room D
D4. Communications II
Chair:		Gheorghe Zaharia, Vlad Cehan
11^40 – 12^00	Characterizing and Improving Energy-Delay Tradeoffs in Heterogeneous Communication Systems
	Nan Jiang, Jayaprakash Pisharath, Alok Choudhary
12^00 – 12^20	Influence of the Furniture on 60 GHz Radio Propagation in a Residential Environment
	S. Collonge, G. Zaharia, G. El Zein
12^20 – 12^40	Experimental Investigation of the Spatial and Temporal Characteristics of the 60 GHz Radio Propagation within Residential Environments
	S. Collonge, G. Zaharia, G. El Zein
12^40 – 13^00	Scattering by a 2D Square Section Metallic Obstacle
	N. Lucanu, H. Baudrand, D. Cepareanu, P. Gasner
13^00 – 13^20	Electromagnetic Compatibility Analysis of the Printed Circuits Boards Using Finite Element Method
	Tudorel Bitoiu, Lucian Stanciu
13^20 – 13^40	Circuits and Methods for Measurement the Structures with Distributed Constants
	Nicolae S. Dimitrachi, Vitalie I. Nastas

Friday a.m. Room E
E4. Neural Networks I
Chair:		Tiberiu D. Teodorescu
11^40 – 12^00	Using ELMAN and FIR Neural Networks for Short Term Electric Load Forecasting
	A.I. Galarniotis, A.C. Tsakoumis, P. Fessas, S.S. Vladov, V.M. Mladenov
12^00 – 12^20	Short-Term Load Forecasting Using a Chaotic Time Series
	S.P. Michanos, A.C. Tsakoumis, P. Fessas, S.S. Vladov, V.M. Mladenov
12^20 – 12^40	Classification of EEG Signals Represented by AR Models for Cognitive Tasks – a Neural Network Based Method
	Victor Andrei Maiorescu, Monica Serban, Anca Mihaela Lazar
12^40 – 13^00	Using Neural Networks and LPCC to Improve Speech Recognition
	Marius Zbancioc, Mihaela Costin
13^00 – 13^20	Improving Cochlear Implant Performances by MFCC Technique
	Mihaela Costin, Marius Zbancioc

Friday p.m. Room A
A5. Circuits and Systems II
Chair:		Florin Constantinescu
15^10 – 15^30	Mapping Physical Defects to Logic Level for Defect Oriented Testing
	R. Ubar
15^30 – 15^50	A New Approach to Parameter Identification of Linear Circuits
	F.Constantinescu, C.V. Marin, M. Nitescu, D. Marin
15^50 – 16^10	The Reduction of Interference Terms in the Time-Frequency Plane
	Mirela Bianu, A. Isar
16^10 – 16^30	2-D Convex Stability Domain
	Bogdan Dumitrescu
16^30 – 16^50	On Sensitivities in Steady State Circuits
	H. Andrei, F. Spinei, C. Cepisca

Friday p.m. Room B
B5. Integrated Circuits III
Chair:		Razvan Andonie
15^10 – 15^30	BiCMOS Current-Mode Integrators Suitable for Low-Voltage Continuous-Time Filters
	Indrit Myderrizi, Ali Zeki
15^30 – 15^50	Dual Input All-Pass Filter Using DVCC
	Shahram Mineai, Cagri Temizyurek
15^50 – 16^10	A High Slew-Rate Low-Voltage Low-Power Operational Amplifier Using a New Current Injection Circuit
	M. Taherzadeh-Sani, R. Lotfi, H. Zare-Hoseini, O. Shoaei
16^10 – 16^30	An Integrable CMOS Transconductors-based Differentiated Input/Frequency-constant PWM Signal Generator
	M. Siripruchyanun, P. Wardkein, S. Kurutuch
16^30 – 16^50	Differential Implementations of Threshold Logic Gates
	V. Beiu, J.M. Quintana, M.J. Avedilo, R. Andonie
16^50 – 17^10	A Multi-Output Supply-Independent Voltage Reference in Standard CMOS Process for Telemetry-Powering Applications
	Amir M. Sodagar, Khalil Najafi

Friday p.m. Room C
C5. Signal Processing V
Chair:		Corneliu Rusu
15^10 – 15^30	Signal Processing for Loudspeaker Evaluation and Equalization
	Lucian Stanciu, Tudorel Bitoiu-Silisteanu
15^30 – 15^50	Ridges Extraction Method for the Linear AM-FM Modulated Signals Covered by a Zero-Mean Gaussian Noise
	Cornelia E. Gordan, Romulus Reiz
15^50 – 16^10	Synthesis of 3D Surfaces Using the Wavelet Transform
	Carol Rus, Corneliu Rusu
16^10 – 16^30	Results on Quadrature Mirror Filters With Crossband Prediction
	D. Tarniceriu, S. Mereuta
16^30 – 16^50	Transient Performance Degradation of the LMS Adaptive Algorithm
	Lucian Stoica

Friday p.m. Room D
D5. Communications III
Chair:		Ion Marghescu
15^10 – 15^30	Initial Cell Search Procedure in WCDMA – An Improved Algorithm for FDD
	Marius Cinteza, Ion Marghescu, Andrei Enescu
15^30 – 15^50	Design and Performance Evaluation of an Optimization Methodology for Optimal Solution of Cellular Layout Design Problems
	Syed Zahid Ali, Richard J. Read
15^50 – 16^10	Analysis of Circular Arrays as Smart Antennas for Cellular Networks
	I. Bogdan, C. Comsa
16^10 – 16^30	Genetic Algorithm Based Dynamic Channel Assignment for Celular Radio Networks
	G. Grigore, I. Bogdan
16^30 – 16^50	Analysis of Channel Allocation Schemes for Cellular Mobile Communication Networks
	Gabriel Sirbu, Ion Bogdan
16^50 – 17^10	Synthesized Frequency Hopping in GSM Networks: Implementation and Results
	V. Svet, I. Bogdan

Friday p.m. Room E
E5. Neural Networks II
Chair:		Iulian B. Ciocoiu
15^10 – 15^30	Parametric Mapping of Neural Networks to Fine-Grained FPGAs
	Voicu Groza, Babak Noory
15^30 – 15^50	A Comparison of Recurrent Neural Networks for Inverting Matrices
	Jarmo Takala, Adrian Burian, Mikko Ylinen
15^50 – 16^10	Neuronal Prediction System of Meteorological Parameters for Quality Assurance of the Traffic
	Trandabat A., Pislaru M., Ciobanu R.
16^10 – 16^30	Implementation of Neural Network with Approximations Functions
	Mihaela Hnatiuc, Guy Lamarque

Friday p.m. Room A
A6. Circuits and Systems III
Chair:		Mihai Iordache
17^50 – 18^10	New Second-Order Low-Pass, High-Pass and Band-Pass Filters Employing Minimum Number of Active and Passive Elements
	M.A. Ibrahim, H. Kuntman, O. Cicekoglu
18^10 – 18^30	All-Pass Sections Realized with Single First Generation Current Conveyor
	Bilgin Metin, Emre Arslan, Oguzhan Cicekoglu
18^30 – 18^50	Realization of Nth-Order Transfer Functions Using Current Differential Ampilifiers
	Huseyin Bilge, Fuat Anday
18^50 – 19^10	CFA Based Fully Integrated KHN Biquad
	G. Ferri, N. Guerrini, M.C. Piccirilli
19^10 – 19^30	Voltage Controlled Integrators / Differentiators Using Current Feedback Amplifier
	R.K. Nagaria, A. Goswami, P. Venkateswaran, S.K. Sanyal, R. Nandi
19^30 – 19^50	Low Input Impedance Current-Mode Active Filter Using Current-Followers
	Doru E. Tiliute

Friday p.m. Room B
B6. Integrated Circuits IV
Chair:		Cristian Neacsu
17^50 – 18^10	Thermal Noise Analysis of Multi-Bit SC Gain-Stages for Low-Voltage High-Resolution Pipeline ADC Design
	M. Yaser Azizi, Amin Saeedfar, Hashem Z. Hoseini, Omid Shoaei
18^10 – 18^30	A New Curvature-Corrected Voltage Reference Based on the Weight Difference of Gate-Source Voltages for Subthreshold-Operated MOS Transistors
	Cosmin Popa
18^30 – 18^50	A New Linearization Technique for CMOS Differential Amplifier Using Bulk-Driven Weak Inversion MOS Transistors
	C. Popa, D. Coada
18^50 – 19^10	New Linearized Current Mode Lossy Integrators in Bipolar Technology
	R.G. Bozomitu, L. Goras, V. Cehan
19^10 – 19^30	Delay And Short-Circuit Power Expressions Characterizing a CMOS Inverter Driving Resistive Interconnect
	D. Burdia, G. Grigore, C. Ionascu
19^30 – 19^50	New Analog Mode Membership Function Circuit
	Liviu Tigaeru, Dimitrie Alexa, Ovidiu Ursaru
Friday p.m. Room C
C6. Signal Processing VI
Chair:		Radu P. Matei
17^50 – 18^10	Implementation of a Real-Time Audio Watermark Extractor on ARM940t
	Manu Mathew, Yoonhark Oh, Jaeyoung Lee, Changhoon Yim, Kilsu Eo
18^10 – 18^30	On Signal Detection Using Support Vector Machines
	Adrian Burian, Jarmo Takala
18^30 – 18^50	Low Complexity Joint Detection for Utra-TDD Receivers
	L. Fanucci , R. Grasso
18^50 – 19^10	VLSI Design of High-Throughput Processing Elements for Real-Time Particle Filtering
	Shu-Shin Chin, Sangjin Hong
19^10 – 19^30	A Look-Up Based Low-Complexity Parallel Gaussian Noise Generator for Particle Filter Processing
	Magesh Sadasivam, Jyoti Wagholikar, Sangjin Hong

Friday p.m. Room D
D6. Communications IV
Chair:		Nicolae D. Alexandru
17^50 – 18^10	An Improved Power Adaptation for Adaptive TUCM over Flat Rayleigh Fading Channels
	Wu Shouhao, Song Wentao, Luo Hanwen
18^10 – 18^30	Extending the Calculation of Correlation Function for 1I-nO Block Coded Signals
	N.D.Alexandru, C. Chatellier
18^30 – 18^50	Turbo Codes for Nongeo Satellite Communications
	Dariush Abbasi-Moghadam, Kiyan Keyghobad, Mohammad Soleimani
18^50 – 19^10	Performance Analysis for a New CDMA Long Code Fast Computing Method
	He Jiaming, Zeng Xingbin, Xu Bensong
19^10 – 19^30	An Investigation of the Runlenght Limited 2/4,(1,2,4,4) Code for Binary Asymmetric Channels
	F. Diaconu
19^30 – 19^50	A New Method for High-Rate RLL Codes Design
	Luminita Scripcariu, Petrut Duma
Friday p.m. Room E
E6. Nonlinear Dynamics
Chair:		Mircea V. Nemescu
17^50 – 18^10	Periodic Chaotic Spreading Sequences with Better Correlation Properties than Conventional Sequences - BER Performances Analysis
	C. Vladeanu, I. Banica, S. El Assad
18^10 – 18^30	Dynamic Properties and Generation of New Hyperchaotic Multi–Scroll Attractors
	Donato Cafagna, Giuseppe Grassi
18^30 – 18^50	Synchronizing Hyperchaotic Systems with Several Non-Linearities: Observer Design and Time-Division Multiplexing of the Scalar Signal
	D. Cafagna, G. Grassi
18^50 – 19^10	Slow Oscillations in Circuits and Nonlinear Systems Described by Duffing Equation
	M.V. Mircea Nemescu, D.D. Lucache, D. Ioachim
19^10 – 19^30	Fourier Transform of Signal Induced in Circuits with Soft Ferrite Cores
	O.F. Caltun