 |
| Navigation |
|
|
| Resume | ||||
OBJECTIVE: My aim is to use my knowledge acquired in 11 years in the following fields: programming languages, signal processing, digital system architectures. Keywords: C, C++, Java, Eclipse, Matlab, Simulink, digital, signal (including image) processing, Verilog, verification, IBM contractor, AMD contractor, team lead, Cadence, Fusion , Vera, Specman, parallel, systolic, architectures
HIGHLIGHTS: - PhD in
Electronics, Master of Science, (Technical University from Iasi,
Romania) - Chip design verification experience: 3 years Position: Verification Engineer, AMD contractor, team lead (5 people) Tasks: - Full chip debug (assembler tests, C++ environment) - Co-ordination of the team with the customer's requests, task dispatch June 2005 – June 2007 ASIC Art S.R.L. (www.asicart.com), Iasi, Romania Position: Verification Engineer, IBM contractor, team lead (10 people) Tasks: - Writing testplans, developing tests for world lead chip (computer electronics topics), south bridge. - Languages: C (PowerPC), Verilog, Vera (OOP), Specman (AOP, test level). critical bugs discovered in time, documented, some of them patched in gatelevel for verification. - JTAG tests implemented (high level and gatelevel) - Made a verification environment from scratch with my team (interface monitors, drivers, generators, protocol checkers, scoreboards, command interfaces). Good with protocol monitor implementation (the reusable part in verification across projects) and fast learner. Implemented the design and configured environment, used tools for bugs management, wrote spec for design and verification. Documented frameworks for testcase writers (random tests combined with directed in the same framework). June 1999 – June 2005 ASIC Art S.R.L. (www.asicart.com), Iasi, Romania Position: DSP Algorithms Development Consultant Tasks: helping staff with signal processing algorithms development/implementation in SW, team lead for several SW projects.
2004 - IT Group (www.itgroup.ro), Bucharest, Romania Position: DSP contractor Tasks: designed in C a low bit rate LPC Voice Coder (http://scs.etc.tuiasi.ro/t-teodor/projects/GSM_codec.html), starting from LPC10 system-level concept.
ACADEMIC EXPERIENCE: 1998 – to present Technical University of Iasi Department of Electronics and Telecommunications, SCS Lab (Signals, Circuits and Systems lab) Iasi, Romania Position: Lecturer Courses and labs: 1998- 2005 course & lab Signals, Circuits and Systems - Linear System Theory (analog and digital), circuit level implementation. Linear transforms (analog and digital),AM and FM modulations, Stability criterions, etc. Almost all modern system level concepts.
1998-2002 lab Programming languages: C
2000-2004 course & lab Object Oriented Programming (C++) - Object oriented principles applied to C++.
2001- 2005 lab Digital Signal Processing - Digital filters (architectures: direct form/transposed/lattice, design: from analog and direct), digital signal processing techniques, fixed taps (filtering) and adaptive applications: noise cancelling, inverse system computation, system modelling. Used during labs ADI SHARC with Visual DSP++ and TI C6711 for audio applications that illustrated the principles taught. Familiar with orthogonal transforms (FFT, DCT, PCA, ICA).
2003- to present course & lab Parallel Digital Architectures and Structures (for Signal Processing). Includes: - parallel and systolic concept formalism; - fixed-point (2’s complement digital arithmetic units): carry-look ahead adder, parallel multiplier (Braun, Baugh-Wooley, Wallace Trees, Dada) and systolic. Booth algorithm. - parallel and systolic (bit serial) FIR, IIR and FFT architectures. Strong math & system knowledge required; - granularity noise and overflow treated systematically. Course in Romanian: http://scs.etc.tuiasi.ro/t-teodor/teaching/undergraduate/ASPC.html 2004 - presents course, labs and project Digital Circuit Design and Verification, Master level Course in English: http://scs.etc.tuiasi.ro/t-teodor/teaching/graduate/PCID.html
RESEARCH: 1997 – to present Technical University of Iasi Department of Electronics and Telecommunications, SCS Lab Iasi, Romania Position: Researcher (team member) Projects: Romanian Research Council Contracts (team member for over 15 contracts awarded), 2 contracts sponsored by the World Bank and 2 sponsored under SCOPES framework, by Swiss National Science Foundation (SNSF).
COMPUTER SKILLS: Experienced in C/C++, Matlab and Simulink. I was awarded a Brainbench certificate for C++ and DSP Brainbench Master Certificate (http://scs.etc.tuiasi.ro/t-teodor. Programming Languages: X86 assembler, C/C++. Java Operating Systems: Windows server and client, Linux, AIX. Office Tools: Microsoft Office Suites: Word, Excel, PowerPoint EDUCATION: Jan 1997 – Mar 2002 Ph.D. in Electrical Engineering, Technical University of Iasi, Romania Ph.D. Thesis Title: Contributions on Studying Cellular Neural Networks (CNNs) Ph.D. Advisor: Professor
Liviu Goras, Former President of IEEE Romania, nowadays International
Board member Sept 1996 – Jun 1997 Master of Science in Electrical Engineering, Technical University of Iasi, Romania Research area: Techniques for Data Acquisition and Signal Processing in Electronics, GPA 9.83/10 Sept 1991 – Jun 1996 Bachelor of Science in Electrical Engineering (graduated with honors, first in my year – 150 people), Technical University of Iasi. Major: Applied Electronics License Diploma 10/10, GPA 9.60/10 RELEVANT COURSES AND SEMINARS GIVEN: July 2006 Technical University of Iasi International summer course. Topics: The basics of signal processing, DSP, LPC Vocoder, Biometrics Signal Processing: http://johnny.best.eu.org/event.jsp?activity=ceosuem
2001, 2003 Institute of Micro Technology, Neuchâtel, Switzerland (http://www2.unine.ch/imt/esplab) I held seminars on the following subjects: color-based face detection algorithms, Hidden Markov Models applied to face authentication and recognition
RELEVANT COURSES AND SEMINARS RECEIVED (POSTGRADUATE): June, August - September 2007, on site training on AMD architecture at AMD facilities in Austin May 2005 Technical University of Iasi, Electronics & Telecom Department (http://scs.etc.tuiasi.ro), Iasi, Romania Advanced Signal Processing, held by PD Dr. Michael Ansorge, Head of Low-Power Multimedia Processing Group, University of Neuchatel, Switzerland (http://www2.unine.ch/imt/esplab)
RELEVANT DIPLOMA PROJECTS DEVELOPED I worked on DSP issues that involved audio signal compression (voice) with my students for their Master diploma work. This work involved knowledge in Matlab/Simulink for prototyping, C implementation and testing of blocks (work for projects was splitted among 3 students). Testing of the algorithms for audio compression involved 2 computers linked through Ethernet interface, one using microphone interface and the other speaker (for playing the recovered signal). There were Windows & Linux and implementations of these projects.
SELECTED PUBLICATIONS: L. Goras, T. D. Teodorescu, R. Ghinea – “On the Spatio-Temporal Dynamics of a Class of Cellular Neural Networks”, Invited Paper at Journal of Circuits, Systems and Computers (Special Issue on "CNN Technology and Visual Microprocessors"), World Scientific, August 2003 Issue. L. Goras, T. D. Teodorescu, R. Ghinea, E. David, P. Ungureanu – “On the Dynamics of Some Classes of Cellular Neural Networks”, chapter in “Cellular Neural Networks : Theory and Applications” Publisher :Nova Science Pub Inc Published 2004/09. pp. 77 – 96. For the extended list of papers in international conferences (it is not updated since 2004, sorry), please see the Papers section on my URL: http://scs.etc.tuiasi.ro/t-teodor
CONFERENCE ACTIVITY: I participated in the Organizing Committee of International Symposium on Signal, Circuits and Systems (ISSCS) 1997, 1999, 2001, 2003 and 2005 editions. Snapshot: http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=1511249. Next edition’s site (2007): http://scs.etc.tuiasi.ro/isscs2007/. ISSCS is an international symposium in IEEE Agenda (Link) I was reviewer starting with edition 2003, on Signal Processing (HW and SW) sections.
AWARDS - I have been awarded with two scholarships (one of 3 month and one of 2 month) at Institute of Microtehnology Neuchatel, Switzerland, working in development and implementation of real time face detection (EM alg) and face authentication algorithms (EHMM based – see Ara Nefian’s research at Intel http://www.intel.com/technology/techresearch/people/bios/nefian_a.htm). - 2 Brainbench awards, DSP Master and passed C/C++ tests.
FUTURE INTERESTS: I like to take a task, find the best solution from system/algorithmic/architectural/verification point of view and to implement it. I think that dealing with with tradeoffs represents what engineering is about. I have taste for verification of large SW/HW designs (HW/SW co-simulation).
MILITARY: NO OBLIGATION LANGUAGES: English (fluent), Romanian (native) REFERENCES: Reference letters are available from former colleagues working in USA and actual managers from both workplaces: company and university.
|
||||
| Copyright © 2004-2008 Tiberiu Dinu Teodorescu. | ||||
