Tuesday

a.m.

room AULA

09⁰⁰ – 09¹⁵

Opening Ceremony

09¹⁵ – 10⁰⁰

Plenary talk:

Reasons, Protocols and Mechanisms for Communicatings Asynchronously Between Digital Processes

King’s College London, UK

Tuesday

a.m.

room D

Integrated Circuits I

Chair:

Sadri Özcan

10⁴⁰ – 11⁰⁰

Realization of a High Performance CMOS Dota with Extended Linearity Range

B. S. Ergun, H. Kuntman, S. Özcan

11⁰⁰ – 11²⁰

A New Differential Current Conveyor and its Application as a Four Quadrant Multiplier

H. F. Hamed, A. El-Gaafary, M.S.A. El-Hakeem

11²⁰ – 11⁴⁰

Two New Transimpedance Preamplifier Topologies for High-Frequency Applications

J. M. Castillo, A. Díaz-Sánchez

11⁴⁰ – 12⁰⁰

High Gain and Low-Power Load Compensated Cascode OTA  Using Feedforward Technique with Frequency-Dependent Current Mirrors

L. Bouzerara, M.T.Belaroussi

12⁰⁰ – 12²⁰

Behavioral Models of Charge Pumps for Nonvolatile Memories

Boccuni, R. Gulino, G. Palumbo

12²⁰ – 12⁴⁰

An Analytical Model for Delay and Short-Circuit Energy Dissipation for

Submicrometer CMOS Inverters

D. Burdia, Gh. Maxim

Tuesday

a.m.

room B

Communications I

Chair:

Dumitru Sandu

10⁴⁰ – 11⁰⁰

In Vitro Microwave Irradiation of Catalase Enzyme

D.D. Sandu, O. G. Avadanei, C.P. Gainaru, R.A. Gainaru

11⁰⁰ – 11²⁰

Design and Experiment on Microstrip Patch Antennas

O. G. Avadanei, D.D. Sandu, D. Ionesei

11²⁰ – 11⁴⁰

Design of Microcontroller Programmable Microstrip Disk Resonator Interfaced with Two Varactor Diodes

T. Chakravarty, S. K. Sanyal

11⁴⁰ – 12⁰⁰

Scattering by Two Arbitrary Placed Metallic Dipoles

N. Lucanu, F. Surre, P. Gassner, H. Baudrand

12⁰⁰ – 12²⁰

Optical Signal Processing for Phased Array Radar Antennas

M. Sova, I. Bogdan

12²⁰ – 12⁴⁰

Yagi-Uda Antenna Optimization Using NEC

I. Bogdan, P. Cotae

Tuesday

a.m.

room A

Signal Processing I

Chair:

Dumitru Stanomir

10⁴⁰ – 11⁰⁰

Estimation of Discrete Wavelet Transform Coefficients of Non-Uniformly Sampled Signals

M. Petkovski, M. Bogdanov

11⁰⁰ – 11²⁰

Numerical Experiments in Constructing Scaling Functions and Mother Wavelets

D. Stanomir, C. Negrescu, V. Chereches

11²⁰ – 11⁴⁰

Using Multilinear Forms for Obtaining the Wavelet Set in the Haar 2-D Case

D. Stanomir, C. Negrescu, L. Tincu

11⁴⁰ – 12⁰⁰

Denoising of Emg Signal Wavelet Transform

M. Ungureanu, R. Strungaru, V. Lazarescu

12⁰⁰ – 12²⁰

A Simple Approach for the Evaluation of Coefficients' Variance in Multiresolution Analysis with Wavelets

D. Coltuc, R. Radescu

12²⁰ – 12⁴⁰

On the Initialization Errors of the Discrete Wavelet Transform Algorithm

D. Isar, A. Isar

Tuesday

a.m.

room C

Nonlinear dynamics

Chair:

Horia Nicolai Teodorescu

10⁴⁰ – 11⁰⁰

A Cryptosystem Based on Chaotic Dynamics

Yu. V. Andreyev, A. A. Dmitriev

11⁰⁰ – 11²⁰

Parametric Pattern Control for Cellular Automate with Self-Oscillating Neurons

H.N.Teodorescu, I. Jan-Catalin

11²⁰ – 11⁴⁰

Three-Point Circuit for Generating Band-Limited Chaotic Oscillations

N. A. Maximov, A. I. Panas

11⁴⁰ – 12⁰⁰

Design and Implementation of a Simplified Neurofuzzy Controller

I. N. Da Silva, M. E. Bordon, A. N. De Souza

12⁰⁰ – 12²⁰

A New Estimation Method for Membership Values in Fuzzy Sets

E. M. Abdelrahim, T. Yahagi

12²⁰ – 12⁴⁰

A Transformed Input-Domain ANFIS for Highly Nonlinear System Modeling and Prediction

E. M. Abdelrahim, T. Yahagi

Tuesday

p.m.

room D

Integrated Circuits II

Chair:

Felicia Ionescu

14³⁰ – 14⁵⁰

CMOS Gates Power Estimation

Wen-Tsong Shiue

15¹⁰ – 15³⁰

Structural Method of Optimized Fault Location Using a Guide Probe

Vladimir Rustinov

15³⁰ – 15⁵⁰

Automatic Test Vectors Generation with False Boolean Functions

M. Ionescu, F. Ionescu

15⁵⁰ – 16¹⁰

Hierarchical Fault Simulation in Digital Systems

R. Ubar, J. Raik, E. Ivask, M. Brik

16¹⁰ – 16³⁰

Tolerance Allocation for an Electronic System Using Neural Network/Monte-Carlo Approach

M. Al-Mohammed, D.Esteve, J. Boucher

Tuesday

p.m.

room B

Communications II

Chair:

Ioan Bogdan

14³⁰ – 14⁵⁰

Time-Harmonic Electromagnetic Analysis of a Braided Shield

Mihaela Lascu

14⁵⁰ – 15¹⁰

A Cable Equalizer Architecture with Spectrum-Error-Feedback Adaptation

X. Lin, Y. Huang, J. Zhou, J. Liu

15¹⁰ – 15³⁰

Telemetry System for ECG and Spiroergometric Data Transmission and Evaluation

Milan STORK

15³⁰ – 15⁵⁰

Clock Recovery for Asynchronous Transmission: FPGA Based Solutions

R. Mita, G. Palumbo

15⁵⁰ – 16¹⁰

A Linearly Approximated Combined Matched Filter for a Clock Recovery Circuit of QPSK

Eun-Jeong Shin, Il-Soon Jang, Eung-Bae Kim, Kyoung-Rok Cho

Tuesday

p.m.

room A

Signal Processing II

Chair:

Milan Markovic

14³⁰ – 14⁵⁰

Percentual Cryptography on MPEG-2AAC Audio Files

F. J. Macian, A. Torrubia, F. J. Mora

14⁵⁰ – 15¹⁰

MLP Neural Net Classifiers Using Cepstral Coefficients for Speaker Recognition Applications

M. Inal, E. Butun, K. Erkan, A. Metin

15¹⁰ – 15³⁰

On the Extraction of the Valid Speech-Sound by the Merging Algorithm with the Discrete Wavelet Transform

Jin Ok Kim, Dae Jun Hwang, Han Wook Paek, Chin Hyun Chung

15³⁰ – 15⁵⁰

Robust AR Speech Analysis Based on Frame-Based Quadratic Classifier with Heuristically Decision Threshold

Milan Markovic

15⁵⁰ – 16¹⁰

A New Design Methodology for Window-Based FIR Filters

G. Capizzi, S. Coco, G. Pappalardo, N.I. Piazzese

16¹⁰ – 16³⁰

A Hierarchical Associative Memory

I. B. Ciocoiu

Tuesday

p.m.

room C

Digital systems

Chair:

Vasily Moshnyaga

14³⁰ – 14⁵⁰

The Design of High-Speed Galois-Field Multiplier with Delay Boxes

S. Choi, Y. Lee, H. Jeon, K. Kim

14⁵⁰ – 15¹⁰

High Radix Square Root Algorithm

Akil E. Bashagha

15¹⁰ – 15³⁰

Pipeline Design in Synchronous Action Systems

T. Seceleanu, J. Plosila

15³⁰ – 15⁵⁰

An Experimental Comparison of Adiabatic Logic Styles

J. Tanaka, H. Shin-Ei, V. G. Moshnyaga

15⁵⁰ – 16¹⁰

Reducing Switching Activity of  Subtraction via Bit Truncation

Vasily G. Moshnyaga

Tuesday

p.m.

room A

Integrated Circuits III

Chair:

Juan Santana Corte

17¹⁰ – 17³⁰

A Calibration-Free Pipelined A/D Converter for High-Speed Application

R Sun, L. Peng

17³⁰ – 17⁵⁰

Design of a 3v 8-Bit 300msps CMOS A/D Converter with an Improved Folding/Interpolation Technique

S. Kim, M. Song

17⁵⁰ – 18¹⁰

Effect of Radix<2 on the Performance Of Pipelined Analog-to-Digital Converters

B. Nejati, H. R. Ahmadi

18¹⁰ – 18³⁰

Upper Limit of the Signal-to-Noise Ratio of Switched-Current S D Modulators

M. Garcia A., Guillermo Espinoza-F-V, D. Baez-Lopez

18³⁰ – 18⁵⁰

Switched-Capacitor Band-Pass Sigma-Delta Modulator with 4x Parallelism

S. J. Ashtiani, A. Khakifirooz, O. Shoaei

18⁵⁰ – 19¹⁰

Reducing No-Idealities in Switched-Current Circuits

F. Sandoval-Ibarra, J. Santana Corte, J. Moran-Serna

Tuesday

p.m.

room B

Circuits and Systems Theory

Chair:

Mihai Iordache

17¹⁰ – 17³⁰

A CAD Tool for the Synthesis of Continuous Time Filters Using gm-C Integrators

A. Mariscal-Magana, J. Santana-Corte, F. Sandoval-Ibarra, L.A. Martinez-Alvarado

17³⁰ – 17⁵⁰

A Hierarchical Approach to Automatically Formulate the Symbolic State Equations of Large–Scale Analog Circuits

M. Iordache, L. Dumitriu

17⁵⁰ – 18¹⁰

Delay Dependent Robust Stability of Uncertain Lurie System

Li Xie, G. Xiong, X. He, T.R. Nyberg, X. Xu

18¹⁰ – 18³⁰

On the Intrinsic Limiting Zeros as the Sampling Period Tends to Zero

M. De La Sen, R. Barcena, A.J.Garrido

18³⁰ – 18⁵⁰

An Extension of the Notion of Observability at Filtering and Sampling Devices

Cristian I. Toma

18⁵⁰ – 19¹⁰

Harmonic Balance Analysis of Magnetic Parametric Oscillators

C. M. Arturi, D. Bellan

Tuesday

p.m.

room D

Signal Processing III

Chair:

Silviu Ciorchina

17¹⁰ – 17³⁰

Comparative Evaluation of Some Least Squares Multifrequency Tracking Methods

S. Ciochina, S. Slavnicu

17³⁰ – 17⁵⁰

Modified QRD-LSL Adaptive Algorithm with Lower Computational Complexity

C. Paleologu, S. Ciochina

17⁵⁰ – 18¹⁰

Printer Belt Drive System Managed with a Fractional Order Hold Device

R. Bárcena, M. De La Sen, I. Sagastabeitia

18¹⁰ – 18³⁰

On the Various LMS Algorithms for FS-DFE with Low Hardware Complexity Suitable for the High Order QAM Application

Yeon Gon Cho, Byung Wook Kim, Hyeong-Seok Yu, Jun Dong Cho, Jea Woo Kim, Jae Kon Lee,Hyun Chul Park,Ki Won Lee

18³⁰ – 18⁵⁰

Numerical Inversion of Vector Laplace Transforms in Matlab Language with Applications

L. Brancík

18⁵⁰ – 19¹⁰

A CORDIC  Realization of the LMS Based Complex Adaptive Equalizer

S. Pervin, A. S. Dhar, M. Chakraborty

Tuesday

p.m.

room C

Complex Systems

Chair:

Laurentiu Dimitriu

17¹⁰ – 17³⁰

Implementation of Recursive Filtering in Hypercube Parallel Processing System

N. Allahverdi, S. Gunes, A. Ozturk

17³⁰ – 17⁵⁰

Fault Tolerant Routing Algorithm Based on Parallel Branching Method for Faulty Hypercubes

S. Gunes, N. Yilmaz, A. Ozturk, N. Allahverdi

17⁵⁰ – 18¹⁰

Network Scanners as Security Monitoring Means in the Computer Systems

V.Ye. Mukhin, V.P. Shyrotchin

18¹⁰ – 18³⁰

Algorithm for Optimal Access in Disk Arrays

S. Stancescu, S. A. Savu

18³⁰ – 18⁵⁰

Diagnosis of a Complex Real-Time System

L. Dimitriu, L. Vornicu

18⁵⁰ – 19¹⁰

A Real Time Complex System Analysis and Execution Method

L. Vornicu, L. Dimitriu, C. Galea

Wednesday

a.m.

room A

Nonlinear Signal Processing Methods, Devices and Applications I

Chair:

Michael Ansorge, Peter Seitz, Liviu Goras

9⁰⁰ – 10⁰⁰

Very Low-Power Image Acquisition and Processing for Portable Communication Devices

M. Ansorge, F. Pellandini, S. Tanner, J. Bracamonte, P. Stadelmann, J.-L. Nagel, P. Seitz, N. Blanc, C. Piguet

10⁰⁰ – 10²⁰

Face Recognition By Pseudo-Spectral Transform And PNN Classification

G. Capizzi, S. Coco, G. Pappalardo

10²⁰ – 10⁴⁰

On Pattern Kernel With Multi-Resolution Architecture For A Lip Print Recognition

J. O. Kim, D. J. Hwang, K. S. Paik, C. H. Chung

10⁴⁰ – 11⁰⁰

New Image Processing Tasks On Binary Images Using Standard CNNs

Radu Matei

Wednesday

a.m.

room B

Power ElectronicsI

Chair:

Dimitrie Alexa

9⁰⁰ – 9²⁰

Control Strategy of a Solar Power Inverter (Third Order System)

K. H. Edelmoser, F. A. Himmelstoss

9²⁰ – 9⁴⁰

Basic Properties of a Multifrequency Model of Pulse-Width-Modulated DC-DC Converters

Y. Fuad, J. W. Van Der Woude, W.L. de Koning

9⁴⁰ – 10⁰⁰

A Mixed P-Z Approach for Analysis of Power Inverters with Periodic PWM

Jiri Klima

10⁰⁰ – 10²⁰

Coding Synchronous Pulsewidth Modulation with Improved Characteristic

V. Oleschuk, A. Sizov, E. Yaroshenko

10²⁰ – 10⁴⁰

Voltage Source Multilevel Three-Phase Inverter I

M. Lucanu, N.C.Popescu, D.O.Neacsu, N.Lucanu

10⁴⁰ – 11⁰⁰

Voltage Source Multilevel Three-Phase Inverter II

M. Lucanu, N.C.Popescu, D.O.Neacsu, N.Lucanu

Wednesday

a.m.

room

Prototyping and Instrumentation

Chair:

Iulian Ciocoiu

9⁰⁰ – 9²⁰

Reuse Methodology in FPGA/ASIC Digital Integration for Vector Control of Motor Drives

Y. Kebatti,  Y. A. Chapuis,  F. Braun

9²⁰ – 9⁴⁰

Accurate Continuous Periodic Signal Generation by Using a Conventional DAC WRAPAROUND MODE

A. N. Kalashnikov, A. F. Nazarenko, V. A. Vlasenko

9⁴⁰ – 10⁰⁰

On a Possibility of a Priority-Based System for Servicing Interrupts on Intel 8051 Microcontroller

P. Duma, L. Scripcariu

10⁰⁰ – 10²⁰

About a Self-Replication, Self-Repair and Self-Test in Multiplexer-Based FPGA Inspired by Biological Processes Part I

A. Clime, C.D.Nita, C.S. Vicol

10²⁰ – 10⁴⁰

About a Self-Replication, Self-Repair and Self-Test in Multiplexer-Based FPGA Inspired by Biological Processes Part II

A. Clime, C.D.Nita, C.S. Vicol

10⁴⁰ – 11⁰⁰

About a Self-Replication, Self-Repair and Self-Test in Multiplexer-Based FPGA Inspired by Biological Processes Part III

A. Clime, C.D.Nita, C.S. Vicol

Wednesday

a.m.

room D

Nonlinear Signal Processing Methods, Devices and Applications II

Chair:

Michael Ansorge, Peter Seitz, Liviu Goras

11⁴⁰ – 11⁵⁵

Three Dimensional Images and Complex Dynamics Processing Using a CNN

P. Arena, A. Basile, L. Fortuna

11⁵⁵ – 12¹⁰

Implementation of an Image Segmentation Algorithm on CNN Chip

P. Arena, A. Basile, M. Bucolo, L. Fortuna

12¹⁰ – 12²⁵

On the Classification Properties of a Simplicial Neural Cell With an Efficient Mixed-Signal Implementation

R. Dogaru, J. Becker, M. Glesner

12²⁵ – 12⁴⁰

A Compact and Efficient Nonlinear Filter Based on a Synergy between Standard Cellular Neural Networks and Simplicial Inferences

R. Dogaru, P. Julian, L.O.Chua

12⁴⁰ – 12⁵⁵

On the Dynamic Properties of Coupled Cellular Neural Networks with Simplicial Cells

Radu Dogaru

12⁵⁵ – 13¹⁵

On the Dynamics of a Class of CNN’s

L. Goras, T. D. Teodorescu

13¹⁵ – 13³⁵

Two Approaches for Studying Single Coupled Second Order Cell CNN’s

T. D. Teodorescu, L. Goras

Wednesday

a.m.

room A

Power ElectronicsII

Chair:

Mihai Lucanu

11⁴⁰ – 12⁰⁰

Integrated Cell to Protect Motorcycle Electronics from Power-Supply Overvoltage

P. D'abramo, R. Roncella, R. Saletti

12⁰⁰ – 12²⁰

Dynamic Regime Control of a Spark Ignition Engine Using Fuzzy Inferential Systems

I.Raducanu, L. Dimitriu

12²⁰ – 12⁴⁰

Steady-State Regime Control for the Spark Ignition Engine Using Fuzzy Inferential Systems

I.Raducanu, L. Dumitriu

12⁴⁰ – 13⁰⁰

Modeling Rl Circuits. Frequency and Waveforms Dependence

O. F. Caltun

13⁰⁰ – 13²⁰

New Combined Filtering System

T. Goras, D. Alexa, A. Sirbu, I. Pletea

13²⁰ – 13⁴⁰

A High Performance Multilevel Three-Phase PWM Inverter Topology

C. Galea, M. Lucanu, O. Ursaru, L. Vornicu

Wednesday

a.m.

room C

Analog Filters I

Chair:

Maria Piccirilli

11⁴⁰ – 12⁰⁰

Current-Mode Biquad Filters Using Unity Gain Current Conveyors

Maria Cristina Piccirilli

12⁰⁰ – 12²⁰

A New Wideband Low Input Resistance Current Conveyor

and its Application as a High Frequency Filter

H. F. Hamed, A. El-Gaafary, M.S.A. El-Hakeem

12²⁰ – 12⁴⁰

High Output Impedance Current Mode Third Order Equal Passive Component Butterworth Filter

M. Aksoy, O Cicekoglu, H. Kuntman

12⁴⁰ – 13⁰⁰

First Order Current-Mode All-Pass Filters Using CCCIIS

S. Minaei, O. Cicekoglu, H. Kuntman, S. Türköz

13⁰⁰ – 13²⁰

Bicmos Realization of the Second-Generation Current

Controlled Conveyor (CCCIIS) and its Application

Shahram Minaei

13²⁰ – 13⁴⁰

A Novel Current-Mode Current-Controlled Universal

Filter Using Translinear Current Conveyors

Shahram Minaei, Muhammed A. Ibrahim

Wednesday

a.m.

room B

Integrated Circuits IV

Chair:

Akil E.Bashagha

11⁴⁰ – 12⁰⁰

A CAD Tool for Low Power Memory Design

Wen-Tsong Shiue

12⁰⁰ – 12²⁰

A Smart Pixel Sensor for Industrial Control

E. Senn, D. Emzivat, E. Martin

12²⁰ – 12⁴⁰

A 1.5v Low Power Integrated CMOS Front-End Receiver for Wireless Systems

K. K. Loa, V. Thng, C. K. Sin, J. G. Ma, K. S. Yeo, M. A. Do

12⁴⁰ – 13⁰⁰

A Tunable Low Power 2.06ghz CMOS LNA with Inductor-Less and Negative Conductance Generator

J. N. Yang , C.Y. Lee, Y.CHang Cheng ,T.Y. Hsu, T.R. Hsu

13⁰⁰ – 13²⁰

An Accurate Current Source for Low- Voltage Current-Mode Transmitter Driver with On-Chip Self-Calibration

G. Zhang, S. Sterrantino, J. Zhou, J. Liu

13²⁰ – 13⁴⁰

A Low Power RF Frontend IC in Standard 0.7um CMOS

Ozlem A. Sen

Wednesday

p.m.

room A

Image Processing

Chair:

Vasile Buzuloiu

15³⁰ – 15⁵⁰

Design and Analysis of Nonlinear Filter for Echocardiographic Images on Wavelet-Based Method

S. C. Kang, S.H. Hong

15⁵⁰ – 16¹⁰

BTC Image Bit Plane Coding

Yung - Gi Wu

16¹⁰ – 16³⁰

Fast Block Matching Algorithm Based on Video Motion Type Using Bitcem Object Tracking Technique

Po-Hung Chen, Kuo-Liang Yeh, Mon-Chau Shie, F. Lai, Chung-Wei Yu

16³⁰ – 16⁵⁰

Parallel Coordinates for Color Image Processing

C. Vertan, M. Ciuc, V. Buzuloiu

16⁵⁰ – 17¹⁰

Redundancy Reduction of Morphological Binary Structure

D.N.Vizireanu, A.Vizireanu

17¹⁰ – 17³⁰

Error Free Grayscale Images Coding Method Using Morphological Binary Skeletons

N.D.Vizireanu,C.Pirnog, A.Vizireanu

Wednesday

p.m.

room B

DSP

Chair:

Radu Dogaru

15³⁰ – 15⁵⁰

Exploring the VLSI Design Space for Low Power DCT/IRCT Macro Cells

L. Fanucci, S. Saponara, A. Barsanti

15⁵⁰ – 16¹⁰

Compiler Design for DSP Processors

Wen-Tsong Shiue

16¹⁰ – 16³⁰

Design of an Arithmetic Logic Unit(ALU) with an Adpative Leaf-Cell Based Layout

W. Jung, M. Song

16³⁰ – 16⁵⁰

Average Bit Transition for Non Zero-Mean Signals in DSP Architectures

A. G. Ortiz, M. Glesner

16⁵⁰ – 17¹⁰

Refresh-Less Dynamic Memory Architecture for Single Chip Low-Power DSP ASIC Designs

S. Hong, J. Yi

17¹⁰ – 17³⁰

Semi-Custom VLSI Chip Implementation of a New Two-Dimensional Separable Median Filtering Algorithm

Ahmad A. Hiasat

Wednesday

p.m.

room D

Analog Filters II

Chair:

Alexander Korotkov

15³⁰ – 15⁵⁰

A Gm-C Technique for High Frequency

J. Sabadell, S. Celma, D. Flandre

15⁵⁰ – 16¹⁰

A Technique for High-Accuracy Digitally Programmable Continuous-Time Filtering

S. Celma, J. Sabadell

16¹⁰ – 16³⁰

Topological Analysis of Continuous- and Discrete Time Current-Conveyor Based Circuits

A.S.Korotkov And A.A.Tutyshkin

16³⁰ – 16⁵⁰

Analog Adaptive Median Filters for Image Processing Applications

A. Díaz-Sánchez, J. R. Angulo

16⁵⁰ – 17¹⁰

Second-Order Active Filter Using a Single Current Conveyor

Doru E. Tiliute

17¹⁰ – 17³⁰

A Log-Domain Low-Pass Biquad Filter with Low-Voltage and Low Distortion

Li Cai, Xikui Ma

Wednesday

p.m.

room C

Information Theory

Chair:

Adriana Vlad

15³⁰ – 15⁵⁰

Power Optimization Using Coding Methods on Arithmetic Operators

E. Costa, S. Bampi, J. Monteiro

15⁵⁰ – 16¹⁰

Towards Efficient Calculation of Information Measures for Reordering of Binary Decision Diagrams

D.V. Popel

16¹⁰ – 16³⁰

The Type II Statistical Error when Verifying that Probability Belongs to an Interval: its Use in Printed Romanian Modelling

Adriana Vlad, A. Mitrea, M. Mitrea

16³⁰ – 16⁵⁰

New Codes Derived from Polynomial Error-Correcting Codes

I. Cleju, A. Sarbu

16⁵⁰ – 17¹⁰

About Turbo-Codes for Error-Correction

L. Scripcariu, P. Cotae